README.md
# Bare ESP32-S3 smartwatch, v0.2.0
`index.tsx` is the actual routed 34 x 38 x 0.8 mm four-layer board: 154 component footprints, 92 connected nets, 1497 traces, 335 through-vias, 100% physical connectivity, zero native DRC errors, zero detected PCB/Gerber shorts. Hash-bound evidence and warnings are in `reports/esp32/validation.json`.
`assembly.circuit.tsx` is the compact assembly. `assembly-exploded.circuit.tsx` shows the same dimensioned parts separated for review. All 19 native subassemblies match their CAD bounds individually. The model includes both populated PCB sides, display, connector, battery, coil/ferrite, motor, leads, thermistors, insulation and rounded enclosure. Drawing-based bodies are engineering envelopes, not supplier solid models.
**PROVISIONAL MECHANICAL STUDY:** modeled body is 39 x 50.5 x 14.5 mm. The display's populated flex lacks component-zone and factory-fold dimensions; the shown fold and full enclosure fit remain unqualified. Display-flex chips/stiffeners are not faithfully placed. The earlier 46 mm length target is unmet. No fabrication, physical hardware, RF, Qi/FOD or runtime approval is claimed. See `mechanical/ASSEMBLY_STATUS.md`.
Run `npm ci`, `npm run typecheck`, and `npm run build:site`. The site command builds the routed board and both native assembly entries using the pinned toolchain. All three entries passed cloud build `66c32345-c348-4171-a34e-06117b9d9331`, with successful registry artifact registration. Downloaded native geometry matches the audited board and assembly models; see `reports/esp32/publication-final.json`. The screen interface is a demo.
