0hmX/am3352-ddr-track-b-byte0-wip-20261007
Partial full-board preview: 11 of 47 DDR signal nets routed; power and interfaces incomplete. Fabrication and electrical release blocked.
- Version
- 0.0.1
- License
- unset
- Stars
- 0
contracts/placement.json
{
"U_PMIC": {
"pcbX": 15.0,
"pcbY": 26.0,
"pcbRotation": 0,
"layer": "top"
},
"L_PWR1": {
"pcbX": 9.0,
"pcbY": 32.0,
"pcbRotation": 0,
"layer": "top"
},
"L_PWR2": {
"pcbX": 21.0,
"pcbY": 32.0,
"pcbRotation": 0,
"layer": "top"
},
"L_PWR3": {
"pcbX": 9.0,
"pcbY": 20.0,
"pcbRotation": 0,
"layer": "top"
},
"L_PWR4": {
"pcbX": 21.0,
"pcbY": 20.0,
"pcbRotation": 0,
"layer": "top"
},
"C_PWR1": {
"pcbX": 5.0,
"pcbY": 15.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR2": {
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"pcbY": 11.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR3": {
"pcbX": 15.0,
"pcbY": 15.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR4": {
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"pcbY": 11.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR5": {
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"pcbY": 15.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR6": {
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"pcbY": 12.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR7_B": {
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"pcbY": 11.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR7": {
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"pcbY": 15.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR8_B": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR8": {
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"pcbY": 18.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR9_B": {
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"pcbY": 15.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR9": {
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"pcbY": 22.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR10": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR11": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR12_B": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR12": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_PWR13": {
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"pcbRotation": 0,
"layer": "bottom"
},
"R_PWR1": {
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"pcbY": 21.0,
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"layer": "top"
},
"R_PWR2": {
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},
"R_PWR3": {
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"layer": "top"
},
"R_PWR4": {
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"pcbRotation": 0,
"layer": "top"
},
"R_PWR5": {
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"pcbRotation": 0,
"layer": "top"
},
"R_PWR6": {
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"pcbRotation": 0,
"layer": "top"
},
"R_PWR7": {
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"pcbRotation": 0,
"layer": "top"
},
"SW_PWR1": {
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"pcbY": 37.0,
"pcbRotation": 0,
"layer": "top"
},
"R_RTC_RESET": {
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"pcbY": 23.5,
"pcbRotation": 0,
"layer": "top"
},
"R_RTC_LDO": {
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"pcbRotation": 0,
"layer": "top"
},
"C_RTC_LDO": {
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"pcbY": 23.5,
"pcbRotation": 0,
"layer": "bottom"
},
"R_RTC_WAKE": {
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"pcbY": 24.5,
"pcbRotation": 0,
"layer": "top"
},
"R_PMIC_EN": {
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"pcbY": 21.5,
"pcbRotation": 0,
"layer": "top"
},
"C_VDD_CORE_B": {
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"pcbY": 15.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_VDD_CORE_0": {
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"pcbY": 13.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_VDD_CORE_1": {
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"layer": "bottom"
},
"C_VDD_CORE_2": {
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},
"C_VDD_CORE_3": {
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},
"C_VDD_CORE_4": {
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},
"C_VDD_CORE_5": {
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},
"C_VDD_CORE_6": {
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},
"C_VDD_CORE_7": {
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},
"C_VDD_MPU_B": {
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},
"C_VDD_MPU_0": {
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},
"C_VDD_MPU_1": {
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},
"C_VDD_MPU_2": {
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},
"C_VDD_MPU_3": {
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"C_VDD_MPU_4": {
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"layer": "bottom"
},
"C_VDDS_B": {
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"layer": "bottom"
},
"C_VDDS_0": {
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"layer": "bottom"
},
"C_VDDS_1": {
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},
"C_VDDS_2": {
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"layer": "bottom"
},
"C_VDDS_3": {
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"pcbRotation": 0,
"layer": "bottom"
},
"C_SRAM_CORE_B": {
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"pcbY": 17.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_SRAM_CORE_0": {
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},
"C_SRAM_MPU_B": {
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},
"C_SRAM_MPU_0": {
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},
"C_IO1_B": {
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},
"C_IO1_0": {
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},
"C_IO1_1": {
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},
"C_IO2_B": {
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},
"C_IO2_0": {
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},
"C_IO2_1": {
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},
"C_IO3_B": {
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},
"C_IO3_0": {
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},
"C_IO3_1": {
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},
"C_IO4_B": {
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},
"C_IO4_0": {
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},
"C_IO4_1": {
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},
"C_IO5_B": {
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},
"C_IO5_0": {
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},
"C_IO5_1": {
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},
"C_IO6_B": {
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},
"C_IO6_0": {
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},
"C_IO6_1": {
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},
"C_IO6_2": {
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},
"C_IO6_3": {
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},
"C_IO6_4": {
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},
"C_IO6_5": {
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},
"C_VDDS_PLL_DDR": {
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},
"C_VDDS_PLL_CORE_LCD": {
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},
"C_VDDS_PLL_MPU": {
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},
"C_VDDS_OSC": {
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},
"C_VDDS_RTC": {
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},
"C_VDDA1P8V_USB0": {
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},
"C_VDDA1P8V_USB1": {
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},
"C_VDDA3P3V_USB0": {
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},
"C_VDDA3P3V_USB1": {
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},
"C_CAP_VDD_SRAM_CORE": {
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},
"C_CAP_VDD_SRAM_MPU": {
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},
"C_CAP_VBB_MPU": {
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},
"R_DDR_ZQ": {
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},
"R_DDR_VTP": {
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},
"R_VREF_TOP": {
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},
"R_VREF_BOT": {
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},
"C_VREF_TOP": {
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},
"C_VREF_0": {
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},
"C_VREF_1": {
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},
"C_VREF_2": {
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},
"C_VREF_3": {
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},
"R_DDR_RESET": {
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},
"C_RAM_0": {
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},
"C_RAM_1": {
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},
"C_RAM_2": {
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},
"C_RAM_3": {
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},
"C_RAM_4": {
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},
"C_RAM_5": {
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},
"C_RAM_6": {
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},
"C_RAM_7": {
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},
"C_RAM_8": {
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},
"C_RAM_9": {
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},
"C_RAM_10": {
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},
"C_RAM_11": {
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},
"C_RAM_B": {
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},
"C_SOC_DDR_0": {
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},
"C_SOC_DDR_1": {
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},
"C_SOC_DDR_2": {
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},
"C_SOC_DDR_3": {
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},
"R_BOOT0": {
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},
"R_BOOT1": {
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},
"R_BOOT2": {
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},
"R_BOOT3": {
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},
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},
"R_BOOT5": {
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},
"R_BOOT6": {
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},
"R_BOOT7": {
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},
"R_BOOT8": {
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},
"R_BOOT9": {
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},
"R_BOOT10": {
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},
"R_BOOT11": {
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},
"R_BOOT12": {
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},
"R_BOOT13": {
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},
"R_BOOT14": {
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},
"R_BOOT15": {
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},
"Y_SOC": {
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},
"C_SOC_CLOCK": {
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},
"J_MICROSD": {
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"layer": "top",
"isAllowedToBeOffBoard": true
},
"R_SD_CMD": {
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"pcbRotation": 0,
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},
"R_SD_DAT0": {
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},
"R_SD_DAT1": {
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},
"R_SD_DAT2": {
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},
"R_SD_DAT3": {
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},
"R_SD_CD": {
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},
"C_SD_HF": {
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},
"C_SD_BULK": {
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},
"J_POWER": {
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},
"R_TRST_N": {
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"U_ETH_ISO1": {
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"pcbY": 6.0,
"pcbRotation": 90,
"layer": "top"
},
"C_ETH_ISO1": {
"pcbX": 27.0,
"pcbY": -8.0,
"pcbRotation": 0,
"layer": "bottom"
},
"U_ETH_ISO_OE": {
"pcbX": 14.0,
"pcbY": 9.0,
"pcbRotation": 0,
"layer": "top"
},
"R_ETH_ISO_OE_PU": {
"pcbX": 29.0,
"pcbY": -6.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_ETH_ISO_OE": {
"pcbX": 29.0,
"pcbY": -9.5,
"pcbRotation": 0,
"layer": "bottom"
},
"R_LCD_OE_PU": {
"pcbX": 21.0,
"pcbY": -9.5,
"pcbRotation": 0,
"layer": "bottom"
},
"U_LCD_CLK": {
"pcbX": 22.0,
"pcbY": -37.0,
"pcbRotation": 0,
"layer": "top"
},
"C_LCD_CLK": {
"pcbX": 29.0,
"pcbY": -17.0,
"pcbRotation": 0,
"layer": "bottom"
},
"R_ETH_MDC_SRC": {
"pcbX": 29.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"R_ETH_TXD0_SRC": {
"pcbX": 3.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"R_ETH_TXD1_SRC": {
"pcbX": 6.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"R_ETH_TX_EN_SRC": {
"pcbX": 9.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_RMII_RETURN_A": {
"pcbX": 12.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_RMII_RETURN_B": {
"pcbX": 15.0,
"pcbY": -4.5,
"pcbRotation": 0,
"layer": "bottom"
},
"C_RMII_RETURN_C": {
"pcbX": 18.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
},
"C_RMII_RETURN_D": {
"pcbX": 21.0,
"pcbY": -5.0,
"pcbRotation": 0,
"layer": "bottom"
}
}